ARM1 is a single rack experimental cluster with 16 compute nodes and 80TB in-rack storage. Compute nodes are based on the 64-bit ARM architecture instead of traditional x86-based architecture. Each compute node consists of two 48-core Cavium processors, eight 16GB DDR4 memory (four DIMMs per socket), and one 40 Gigabit Ethernet port. All compute nodes are interconnected through a 40Gigabit Ethernet network.

This system is available to support computer science research projects aimed at exploring the ARM architecture.

Appropriate research topics could include, but are not limited to, functionality testing of research software and prototypes, power-efficiency evaluations, and efforts to improve the system software, runtime support and the programming environment for ARM architecture based systems. Please apply for access to this resource by completing and submitting the ARM1 Testbed Project Application.

Access to the ARM system requires a non-disclosure agreement with the vendor.  In addition, publications resulting from the use of this system will require review by both the OLCF and the vendor to prevent the unintentional release of protected information and to ensure that the reported studies are consistent with the intended use of this experimental system. Submissions shall be sent to, prior to submitting.

All work should include the following acknowledgement statement:

This research used the resources of the Oak Ridge Leadership Computing Facility, located in the National Center for Computational Sciences at the Oak Ridge National Laboratory, which is managed by UT Battelle, LLC for the U.S. Department of Energy, under the contract No. DEAC05-00OR22725.

Version: 1.00